This disclosure relates generally to the field of output stages for input/output (10) drivers for electronic communications, and more particularly to startup and protection circuitry for a thin oxide output stage.
An output stage is an electronic device that generates electronic communications for transmission over a transmission medium, which may be part of any type of computing network. An output stage may be part of a chip or integrated circuit (IC) and may communicate with other chips internal to a computer, or may communicate over an external network such as an optical network. An output stage typically comprises a plurality of field effect transistors (FETs). Thick oxide FETs have typically been used in output stages, as thick oxide FETs may operate over a wide range of voltages without experiencing oxide breakdown. However, thick oxide FETs have relatively high parasitics, resulting in relatively high power consumption for a thick oxide output stage.
An output stage including thin oxide FETs may be used to reduce parasitics and power consumption. However, thin oxide FETs experience oxide breakdown at lower voltages than thick oxide FETs. In some computing systems, the supply voltages are higher than the gate-oxide breakdown limit of the thin oxide FETs in the output stage. Typically, a thin oxide FET may experience a maximum voltage of about 1.1 volts (V) before oxide breakdown occurs. Double data rate (DDR) signaling uses direct current (DC) supply voltages that are higher than the gate oxide breakdown limit of the thin oxide FETs, up to about 1.5V. Additional stacked protection transistors may be used to protect a thin oxide output stage in a DDR system; however, these additional protection transistors increase the complexity of the output stage because the protection devices need additional bias voltages. The power supplies that provide the additional bias voltages may require power sequencing, which is a relatively complex process, at startup or shutdown to avoid subjecting the thin oxide FETs in the output stage to voltages higher than their oxide breakdown voltage.
In a self-contained DDR signaling system, bias voltages need to be generated internally and cannot be provided by additional pins, as DDR systems are typically pin and area limited. Also, because DDR signaling uses a bidirectional link, there is some additional functionality such as on-die-termination (ODT) that make the protection biasing scheme even more demanding. Any power sequencing of the different DC supplies in the system (e.g., VDD for digital logic, VIO for unregulated building blocks, VCCD for regulated building blocks such as the clock path, and VDDR for the output stage) and the internal bias voltages for the thin oxide protection devices are undesired due to cost saving and reliability reasons.